1. Technical Field
The present invention relates to a semiconductor device mounted structure, as well as a semiconductor device mounting method, in which device electrodes of a semiconductor device and board electrodes of a board are connected to each other via bump electrodes, respectively, and in which a sealing-bonding resin is placed between the semiconductor device and the board, so that the semiconductor device is mounted on the board.
2. Background Art
For electronic components, bare chip mounting that allows the mounting area to be remarkably reduced in comparison to conventional semiconductor packages has been in use. Under this condition, face-down mounting is widely used in which a circuit formation surface of a semiconductor chip (semiconductor device) and a circuit formation surface of a board are placed face to face and laid on each other via bumps (bump electrodes) formed of gold or other metal so as to obtain conduction. The face-down mounting allows a semiconductor chip as well as its whole mounted structure to be further downsized, compared with face-up mounting in which a circuit formation surface of a board and a surface of a semiconductor chip opposite to its circuit formation surface are placed face to face and, in this state, metal thin wires are led out by wire bonding so that both-side terminals are connected to each other.
FIG. 13 shows a schematic plan view of a conventional semiconductor chip mounted structure 501 as shown above. FIG. 14 shows a sectional view of the mounted structure 501 taken along the line A-A of FIG. 13. As shown in FIGS. 13 and 14, pads 3, which are a plurality of device electrodes, are formed on a circuit formation surface, i.e. lower-side surface, of a generally rectangular-shaped semiconductor chip 2, while a plurality of board electrodes 5 are formed on a circuit formation surface, i.e. upper-side surface, of a board 4. These pads 3 and board electrodes 5 are electrically connected to each other, respectively and individually, via bumps 6 that are bump electrodes individually formed on the pads 3. Also, between the semiconductor chip 2 and the board 4, an underfill resin 7 is filled and placed as a sealing-bonding insulative resin. Thus, with the pads 3, the board electrodes 5 and the bumps 6 sealed respectively, a mounted structure in which the semiconductor chip 2 and the board 4 are bonded together is constructed.
Such a mounted structure is formed, for example, by executing a so-called sheet method in which the bumps 6 formed on the individual pads 3 of the semiconductor chip 2 and the board 4 having a sheet-like underfill resin 7 attached on its surface are set face to face and thereafter the semiconductor chip 2 is pressed against the board 4 via the underfill resin 7. The conventional sheet method like this, in particular, makes it possible to simultaneously carry out the filling and placement of the underfill resin 7 to between the semiconductor chip 2 and the board 4 as well as the electrical connection between the pads 3 of the semiconductor chip 2 and the board electrodes 5 of the board 4 via the bumps 6. Thus, the method is recognized as effective in terms of process simplification and time savings and has been widely used.
In recent years, advancements have been made toward lower dielectric constants of insulating material inside the chip with a view to scale-down of chip-inside interconnections for size and cost reductions of semiconductor packages. With regard to such low-dielectric-constant resin materials (hereinafter, referred to as “low-k materials”), as the dielectric constant decreases, the resin material becomes more fragile in terms of mechanical strength, posing a fear for internal breakdown of semiconductor chips caused by the fragility of low-k materials in semiconductor chip mounting.
In general, the coefficient of thermal expansion of a semiconductor chip is extremely smaller than those of the underfill resin and the board. Therefore, thermal-expansion differences or thermal contraction differences among the individual members caused by heating and cooling during mounting cause large tensile loads to be generated at portions of the semiconductor chip, particularly corner portions of a rectangular-shaped semiconductor chip. Further, in semiconductor chip mounting, the board is flexed by mechanical loads caused in execution of a board cutting-and-dividing step subsequent to semiconductor chip mounting on the board, i.e. a multiple board cutting-and-dividing process, or a soldering ball process for the board bottom face and the like, with the result that the semiconductor chip is burdened with even larger loads.
In order to reduce these and other loads, for example, JP H11-260973 A describes a countermeasure, as an example, that a so-called stiffener, which is a member of high modulus of elasticity and low coefficient of linear expansion, is insertionally set at corner portions in the underfill resin region between the semiconductor chip and the board so as to reduce the loads due to thermal expansion and contraction. However, such a method indeed allows the loads due to thermal expansion and contraction to be relaxed, but can hardy reduce loads due to the board flexure for after-mounting mechanical loads because of the high modulus of elasticity of the stiffener. In another countermeasure, a so-called elastomer, which is a member of low modulus of elasticity and high coefficient of linear expansion, is insertionally set at the corner portions, as is converse to the above, but this measure may incur increases in loads due to thermal expansion and contraction differences because of the high coefficient of linear expansion of the elastomer.
Accordingly, an object of the present invention, lying in solving the above-described issues, is to provide a semiconductor device mounted structure, as well as a semiconductor device mounting method, in which device electrodes of a semiconductor device and board electrodes of a board are connected to each other via bump electrodes, respectively, and in which a sealing-bonding resin is placed between the semiconductor device and the board so that the semiconductor device is mounted on the board, the device and the method being capable of reducing loads generated at corner portions of the semiconductor device due to board flexures for thermal expansion differences and thermal contraction differences among the individual members caused by heating and cooling during mounting as well as for mechanical loads after the mounting operation so that internal breakdown of the semiconductor device mounted structure can be avoided.